8:30-9:00am |
Welcome |
9:00-10:30am |
Session 1: Register Optimization
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Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs
and Callahan-Koblenz Algorithms |
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Authors: Keith Cooper, Anshuman Dasgupta, and Jason
Eckhardt |
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Paper,
Slides |
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Register Pressure
in Software-Pipelined Loop Nests: Fast Computation and Impact on
Architecture Design |
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Authors: Alban Douillet, Hongbo Rong, and Guang R.
Gao |
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Paper,
Slides |
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Manipulating MAXLIVE For Spill-Free
Register Allocation |
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Authors: Shashi Deepa Arcot, Henry Dietz, and
Sarojini Priyadarshini Rajachidambaram |
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Paper,
Slides |
10:30-11:00am |
Coffee Break |
11:00-12:30pm |
Session 2: Compiling for FPGA's and Network Processors |
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Optimizing
Packet Accesses for a Domain Specific Language on Network Processors |
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Authors: Tao Liu, Xiao-Feng Li, Lixia Liu, and
Chengyong Wu |
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Paper,
Slides |
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Array
Replication to Increase Parallelism in Applications Mapped to Configurable
Architectures |
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Authors: Heidi E. Ziegler, Priyadarshini L. Malusare,
and Pedro C. Diniz |
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Paper,
Slides |
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Generation of
Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code |
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Authors: David C. Zaretsky, Gaurav Mittal, Robert
Dick, and Prith Banerjee |
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Paper,
Slides |
12:30-1:30pm |
Lunch |
1:30-3:30pm |
Session 3: Model-Driven and Empirical Optimization - I |
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Applying
Data Copy To Improve Memory Performance of General Array Computations |
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Author: Qing Yi |
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Paper,
Slides |
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A
Cache-conscious Profitability Model for Empirical Tuning of Loop Fusion |
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Authors: Apan Qasem and Ken Kennedy |
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Paper,
Slides |
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Optimizing
Matrix Multiplication with a Classifier Learning System |
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Authors: Xiaoming Li and Maria Jesus Garzaran |
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Paper,
Slides |
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A Language
for the Compact Representation of Multiple Program Versions |
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Authors: Sebastien Donadio, James Brodman, Thomas
Roeder, Kamen Yotov, Denis Barthou, Albert Cohen, Maria Jesus Garzaran,
David Padua, and Keshav Pingali |
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Paper,
Slides |
3:30-4:00pm |
Coffee Break |
4:00-6:00pm |
Session 4: Parallel Languages |
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Efficient
Computation of May-Happen-in-Parallel Information for Concurrent Java
Programs |
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Author: Rajkishore Barik |
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Paper,
Slides |
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Evaluating
the Impact of Thread Escape Analysis on a Memory Consistency Model-aware
Compiler |
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Authors: Chi-Leung Wong, Zehra Sura, Xing Fang,
Kyungwoo Lee, Samuel P. Midkiff, Jaejin Lee, and David Padua |
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Paper,
Slides |
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Concurrency
Analysis for Parallel Programs with Textually Aligned Barriers |
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Authors: Amir A. Kamil and Katherine A. Yelick |
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Paper,
Slides |
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Titanium
Performance and Potential: an NPB experimental study |
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Authors: Kaushik Datta, Dan Bonachea, and Katherine
Yelick |
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Paper,
Slides |
9:00-10:00am |
Keynote talk |
10:00-10:30am |
Coffee Break |
10:30-12:30am |
Session 5: Model-Driven and Empirical Optimization - II |
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Efficient Search-Space
Pruning for Integrated Fusion and Tiling Transformations |
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Authors: Xiaoyang Gao, Sriram Krishnamoorthy, Swarup
Kumar Sahoo, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, and P.
Sadayappan |
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Paper,
Slides |
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Automatic Measurement of
Instruction Cache Capacity |
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Authors: Kamen Yotov, Sandra Jackson, Tyler Steele,
Keshav Pingali, and Paul Stodghill |
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Paper,
Slides |
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Combined ILP
and Register Tiling: Analytical Model and Optimization Framework |
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Authors: Lakshminarayanan Renganarayana, U.
Ramakrishna, and Sanjay Rajopadhye |
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Paper,
Slides |
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Analytic Models and
Empirical Search: A Hybrid Approach to Code Optimization |
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Authors: Arkady Epshteyn, Maria Garzaran, Gerald
DeJong, David Padua, Gang Ren, Xiaoming Li, Kamen Yotov, and Keshav Pingali |
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Paper,
Slides |
12:30-1:30pm |
Lunch |
1:30-3:00pm |
Session 6: Speculative Execution |
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Testing Speculative Work
in a Lazy/Eager Parallel Functional Language |
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Authors: Alberto de la Encina, Ismael Rodriguez, and
Fernando Rubio |
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Paper,
Slides |
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Loop Selection for
Thread-Level Speculation |
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Authors: Shengyue Wang, Xiaoru Dai, Kiran S
Yellajyosula, Antonia Zhai, and Pen-Chung Yew |
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Paper,
Slides |
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Software Thread Level
Speculation for the Java Language and Virtual Machine Environment |
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Authors: Christopher J. F. Pickett and Clark
Verbrugge |
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Paper,
Slides |
3:00-3:15pm |
Coffee Break |
3:15-4:45pm |
Session 7: Run-time Environments |
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Lightweight
Monitoring of the Progress of Remotely Executing Computations
|
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Authors: Shuo Yang, Ali R. Butt, Y. Charlie Hu,
and Samuel P. Midkiff |
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Paper,
Slides |
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A Platform to
Use Hardware Performance Counters for Dynamic Compilation
|
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Authors: Florian Schneider and Thomas R. Gross |
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Paper,
Slides |
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A
Domain-Specific Interpreter for Parallelizing a Large Mixed-Language
Visualisation Application
|
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Authors: Karen Osmond, Olav Beckmann, Anthony J.
Field, and Paul H. J. Kelly |
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Paper,
Slides |
4:45-5:00pm |
Coffee Break |
5:00-6:30pm |
Panel /Special Session |
6:30-9:00pm |
Dinner |
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9:00-11:00am |
Session 8: Compile-Time Analysis |
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Compiler
Control Power Saving Scheme for Multi Core Processors |
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Authors: Jun Shirako, Naoto Oshiyama,
Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, and Hironori Kasahara |
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Paper,
Slides |
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Code
Transformations for One-Pass Analysis |
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Authors: Xiaogang Li and Gagan Agrawal |
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Paper,
Slides |
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Scalable Arrays SSA and Array Data Flow Analysis |
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Authors: Guobin He, Silvius Rus, and
Lawrence Rauchwerger |
|
Paper,
Slides |
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Interprocedural Symbolic Range Propagation for Optimizing Compilers |
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Authors: Hansang Bae and Rudolf Eigenmann |
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Paper,
Slides |
11:00-11:30am |
Coffee Break |
11:30-12:30pm |
Session 9: Short Papers - I |
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Phase-based Parallelization of Utility Programs |
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Authors: Xipeng Shen and Chen Ding |
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Paper,
Slides |
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A Systematic
Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization |
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Authors: Chun Chen, Jacqueline Chame,
Mary Hall, and Kristina Lerman |
|
Paper,
Slides |
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An Efficient Approach for
Self-Scheduling Parallel Loops on Multiprogrammed Parallel Computers |
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Authors: Arun Kejariwal, Alexandru
Nicolau, and Constantine D. Polychronopoulos |
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Paper,
Slides |
12:30-1:30pm |
Lunch |
1:30-2:30pm |
Session 10: Short Papers - II |
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Dynamic Compilation for Reducing
Energy Consumption of I/O-Intensive Applications |
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Authors: Seung Woo Son, Guangyu Chen,
Mahmut Kandemir, and Alok Choudhary |
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Paper,
Slides |
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Supporting SELL for High-Performance
Computing |
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Authors: Bjarne Stroustrup and Gabriel
Dos Reis |
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Paper,
Slides |
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Compiler Supports and Optimizations
for PAC VLIW DSP Processors |
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Authors: Yung-Chia Lin, Chung-Lin Tang,
Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen, and
Jenq-Kuen Lee |
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Paper,
Slides |
2:30-2:45pm |
Closing Remarks |